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	=HLL to VHDL Conversion Templates=		=HLL to VHDL Conversion Templates=
		+	{| border="1"
		+	|align="center"|'''HLL Expression'''
		+	|align="center"|'''VHDL Expression'''
		+	|align="center"|'''Remarks'''
		+	|+
		+	|align="center"|''variables representation''
		+	|
		+	|
		+	|+
		+	|''integer variable''
		+	|
		+	{|
		+	|''generic'' (DATA_SIZE: natural := 32);
		+	|+
		+	|''signal'' : std_logic_vector (DATA_SIZE-1 ''downto'' 0);
		+	|}
		+	|
		+	|+
		+	|floating point variable
		+	|
		+	|
		+	|+
		+	|}

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Revision as of 10:25, 20 January 2011

HLL to VHDL Conversion Templates

HLL Expression	VHDL Expression	Remarks
variables representation
integer variable	generic (DATA_SIZE: natural := 32); signal : std_logic_vector (DATA_SIZE-1 downto 0);
floating point variable