Presentations
From REuP Project
Revision as of 13:02, 6 April 2011; view current revision
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Instructionless processor architecture using dynamically reconfigurable logic
Latency Hiding by Multicontext Reconfiguration
Loops in C – compilation stages in GCC – code in VHDL
LLVM and Clang: Next Generation Compiler Technology by Chris Lattner
Understanding and writing an LLVM compiler back-end by Bruno Cardoso Lopes, ELC 2009
LLVM + Gallium3D: Mixing a Compiler With a Graphics Framework by Stéphane Marchesin, FOSDEM 2009
Design and Implementation of a TriCore Backend for the LLVM Compiler Framework by Christoph Erhardt
