Polish-Swiss Research Programme team
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| #[[Grzegorz Jabłoński, PhD]] - Workpackages: Compilation, Dedicated Operating System, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | #[[Grzegorz Jabłoński, PhD]] - Workpackages: Compilation, Dedicated Operating System, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | ||
| #[[Kamil Grabowski, PhD]] - Workpackages: Prototype, Final Chip | #[[Kamil Grabowski, PhD]] - Workpackages: Prototype, Final Chip | ||
| - | + | #[[Piotr Zając, PhD]] - Workpackage: Processor Architecture | |
| #[[Piotr Amrozik, MSc]] - Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | #[[Piotr Amrozik, MSc]] - Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | ||
| #[[Maciej Borzęcki, MSc]] - Workpackages: Compilation, Dedicated Operating System | #[[Maciej Borzęcki, MSc]] - Workpackages: Compilation, Dedicated Operating System | ||
| #[[Łukasz Kotynia, MSc]] - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | #[[Łukasz Kotynia, MSc]] - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | ||
| #[[Adam Piotrowski, MSc]] - Workpackages: Compilation, Dedicated Operating System, Processor Architecture | #[[Adam Piotrowski, MSc]] - Workpackages: Compilation, Dedicated Operating System, Processor Architecture | ||
Revision as of 19:46, 13 July 2010
- Rafał Kiełbik, PhD - Workpackages: Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Grzegorz Jabłoński, PhD - Workpackages: Compilation, Dedicated Operating System, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Kamil Grabowski, PhD - Workpackages: Prototype, Final Chip
- Piotr Zając, PhD - Workpackage: Processor Architecture
- Piotr Amrozik, MSc - Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Maciej Borzęcki, MSc - Workpackages: Compilation, Dedicated Operating System
- Łukasz Kotynia, MSc - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Adam Piotrowski, MSc - Workpackages: Compilation, Dedicated Operating System, Processor Architecture
