HLL-to-VHDL Conversion Templates

From REuP Project

(Difference between revisions)
Jump to: navigation, search
Revision as of 10:31, 20 January 2011
Apiotro (Talk | contribs)

← Previous diff
Current revision
Kprzygod (Talk | contribs)

Line 44: Line 44:
|+ |+
|} |}
 +
 +[[Media:Float_ug.pdf|floating point library specification]]

Current revision

HLL Expression VHDL Expression Remarks
variables representation
unsigned integer variable
generic (DATA_SIZE: natural := 32);
signal : std_logic_vector (DATA_SIZE-1 downto 0);
signed integer variable
generic (DATA_SIZE: natural := 32);
??
floating point variable
generic (DATA_SIZE: natural := 32);
??
integer arithmetic operations
floating point arithmetic operations

floating point library specification

Personal tools