Polish-Swiss Research Programme team
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[[Image:zajac.jpeg|80px|frameless|border]][[Piotr Zając, PhD]] - Workpackage: Processor Architecture | [[Image:zajac.jpeg|80px|frameless|border]][[Piotr Zając, PhD]] - Workpackage: Processor Architecture | ||
- | [[Image:swiercz.png|80px|frameless|border]]:[[Bartłomiej Świercz, PhD]] - Workpackages: Compilation, Dedicated Operating System | + | [[Image:swiercz.png|80px|frameless|border]][[Bartłomiej Świercz, PhD]] - Workpackages: Compilation, Dedicated Operating System |
- | #[[Bartosz Sakowicz, PhD]] - Workpackage: Dedicated Operating System | + | [[Image:sakowicz.jpeg|80px|frameless|border]][[Bartosz Sakowicz, PhD]] - Workpackage: Dedicated Operating System |
- | #[[Adrian Romiński, PhD]] - Workpackages: Prototype, Final Chip | + | |
+ | [[Image:rominski.jpeg|80px|frameless|border]][[Adrian Romiński, PhD]] - Workpackages: Prototype, Final Chip | ||
#[[Dariusz Makowski, PhD]] - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | #[[Dariusz Makowski, PhD]] - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | ||
#[[Piotr Amrozik, MSc]] - Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip | #[[Piotr Amrozik, MSc]] - Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip |
Revision as of 07:36, 14 July 2010
Rafał Kiełbik, PhD - Workpackages: Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
Grzegorz Jabłoński, PhD - Workpackages: Compilation, Dedicated Operating System, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
Kamil Grabowski, PhD - Workpackages: Prototype, Final Chip
Piotr Zając, PhD - Workpackage: Processor Architecture
Bartłomiej Świercz, PhD - Workpackages: Compilation, Dedicated Operating System
Bartosz Sakowicz, PhD - Workpackage: Dedicated Operating System
Adrian Romiński, PhD - Workpackages: Prototype, Final Chip
- Dariusz Makowski, PhD - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Piotr Amrozik, MSc - Compilation, Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Maciej Borzęcki, MSc - Workpackages: Compilation, Dedicated Operating System
- Łukasz Kotynia, MSc - Workpackages: Dynamic Reconfiguration, Processor Architecture, Prototype, Final Chip
- Adam Piotrowski, MSc - Workpackages: Compilation, Dedicated Operating System, Processor Architecture